1 #ifndef __LUNAIX_AHCI_H
2 #define __LUNAIX_AHCI_H
8 * e.g. HBA_RPxCLB is Register PxCLB
10 * All registers offset are 0 based index of a DWORD array
13 #define AHCI_HBA_CLASS 0x10601
21 #define HBA_RPBASE (0x40)
22 #define HBA_RPSIZE (0x80 >> 2)
30 #define HBA_RPxSSTS 10
31 #define HBA_RPxSCTL 11
32 #define HBA_RPxSERR 12
33 #define HBA_RPxSACT 13
35 #define HBA_RPxSNTF 15
38 #define HBA_PxCMD_FRE (1 << 4)
39 #define HBA_PxCMD_ST (1)
40 #define HBA_PxINTR_DMA (1 << 2)
41 #define HBA_PxINTR_D2HR (1)
43 #define HBA_RGHC_ACHI_ENABLE (1 << 31)
44 #define HBA_RGHC_INTR_ENABLE (1 << 1)
45 #define HBA_RGHC_RESET 1
47 #define HBA_RPxSSTS_PWR(x) (((x) >> 8) & 0xf)
48 #define HBA_RPxSSTS_IF(x) (((x) >> 4) & 0xf)
49 #define HBA_RPxSSTS_PHYSTATE(x) ((x)&0xf)
51 typedef unsigned int hba_reg_t;
63 volatile hba_reg_t* base;
64 unsigned int ports_num;
65 unsigned int cmd_slots;
67 struct ahci_port* ports[32];
80 #endif /* __LUNAIX_AHCI_H */