1 #ifndef __LUNAIX_ARCH_TLB_H
2 #define __LUNAIX_ARCH_TLB_H
4 #include <lunaix/types.h>
6 #include <asm/aa64_mmu.h>
7 #include <asm/aa64_sysinst.h>
9 #define pack_va(asid, ttl, va) \
10 (((asid & 0xffffUL) << 48) | \
11 ((ttl & 0b1111UL) << 44) | \
12 (pfn(va) & ((1UL << 44) - 1)))
14 #define pack_rva(asid, ttl, base, n, scale) \
15 (((asid & 0xffffUL) << 48) | \
16 ((_MMU_TG & 0b11UL) << 46) | \
17 ((n & 0x1fUL) << 39) | \
18 ((scale & 0b11UL) << 37) | \
19 ((ttl & 0b1111UL) << 44) | \
20 (pfn(base)& ((1UL << 37) - 1)))
23 * @brief Invalidate an entry of all address space
27 static inline void must_inline
28 __tlb_invalidate(ptr_t va)
30 sys_a1(tlbi_vaae1, pack_va(0, 0, va));
34 * @brief Invalidate an entry of an address space indetified
39 static inline void must_inline
40 __tlb_flush_asid(unsigned int asid, ptr_t va)
42 sys_a1(tlbi_vae1, pack_va(asid, 0, va));
46 * @brief Invalidate an entry of global address space
50 static inline void must_inline
51 __tlb_flush_global(ptr_t va)
53 __tlb_flush_asid(0, va);
57 * @brief Invalidate an entire TLB
61 static inline void must_inline
68 * @brief Invalidate an entire address space
72 static inline void must_inline
73 __tlb_flush_asid_all(unsigned int asid)
75 sys_a1(tlbi_aside1, pack_va(asid, 0, 0));
80 * @brief Invalidate entries of all address spaces
87 tlb_flush_range(ptr_t addr, unsigned int npages)
90 for (unsigned int i = 0; i < npages; i++)
92 __tlb_invalidate(addr + i * PAGE_SIZE);
95 sys_a1(tlbi_rvaae1, pack_rva(0, 0, addr, npages, 0));
100 * @brief Invalidate entries of an address space identified
108 tlb_flush_asid_range(unsigned int asid, ptr_t addr, unsigned int npages)
111 for (unsigned int i = 0; i < npages; i++)
113 __tlb_flush_asid(asid, addr + i * PAGE_SIZE);
116 sys_a1(tlbi_rvae1, pack_rva(asid, 0, addr, npages, 0));
120 #include <asm-generic/tlb-shared.h>
122 #endif /* __LUNAIX_VMTLB_H */