PCI 16x50 UART Controller, O2 Enablement (#39)
[lunaix-os.git] / lunaix-os / arch / x86 / trace.c
1 #include <lunaix/trace.h>
2
3 void
4 trace_print_transistion_short(struct hart_state* hstate)
5 {
6     trace_log("  trigger: iv=%d, ecause=%p",
7                 hart_vector_stamp(hstate),
8                 hart_ecause(hstate));
9 }
10
11 #ifdef CONFIG_ARCH_X86_64
12
13 void
14 trace_print_transition_full(struct hart_state* hstate)
15 {
16     trace_log("hart state transition");
17     trace_log("  vector=%d, ecause=0x%x", 
18                 hart_vector_stamp(hstate),
19                 hart_ecause(hstate));
20
21     trace_log("  rflags=0x%016lx", hstate->execp->rflags);
22     trace_log("  sp=0x%016lx, seg_sel=0x%04x", 
23                 hstate->execp->rsp, 
24                 hstate->execp->ss);
25     trace_log("  ip=0x%016lx, seg_sel=0x%04x",
26                 hstate->execp->rip,
27                 hstate->execp->cs);
28 }
29
30 void
31 trace_dump_state(struct hart_state* hstate)
32 {
33     struct regcontext* rh = &hstate->registers;
34     struct exec_param* ep = hstate->execp;
35     trace_log("hart state dump (depth=%d)", hstate->depth);
36     trace_log("  rax=0x%016lx, rbx=0x%016lx",
37                 rh->rax, rh->rbx);
38     trace_log("  rcx=0x%016lx, rdx=0x%016lx",
39                 rh->rcx, rh->rdx);
40     trace_log("  rdi=0x%016lx, rsi=0x%016lx",
41                 rh->rdi, rh->rsi);
42
43     trace_log("   r8=0x%016lx,  r9=0x%016lx",
44                 rh->r8, rh->r9);
45     trace_log("  r10=0x%016lx, r11=0x%016lx",
46                 rh->r10, rh->r11);
47     trace_log("  r12=0x%016lx, r13=0x%016lx",
48                 rh->r12, rh->r13);
49     trace_log("  r14=0x%016lx, r15=0x%016lx",
50                 rh->r14, rh->r15);
51
52     trace_log("   cs=0x%04x, rip=0x%016lx",
53                 ep->cs, ep->rip);
54     trace_log("   ss=0x%04x, rsp=0x%016lx",
55                 ep->ss, ep->rsp);
56     trace_log("  rflags=0x%016lx",
57                 ep->rflags);
58 }
59
60 #else
61
62 void
63 trace_print_transition_full(struct hart_state* hstate)
64 {
65     trace_log("hart state transition");
66     trace_log("  vector=%d, ecause=0x%x", 
67                 hart_vector_stamp(hstate),
68                 hart_ecause(hstate));
69     trace_log("  eflags=0x%x", hstate->execp->eflags);
70     trace_log("  sp=%p, [seg_sel=0x%04x]", 
71                 hstate->execp->esp, 
72                 hstate->execp->ss);
73     trace_log("  ip=%p, seg_sel=0x%04x",
74                 hstate->execp->eip,
75                 hstate->execp->cs);
76 }
77
78 void
79 trace_dump_state(struct hart_state* hstate)
80 {
81     struct regcontext* rh = &hstate->registers;
82     struct exec_param* ep = hstate->execp;
83     trace_log("hart state dump (depth=%d)", hstate->depth);
84     trace_log("  eax=0x%08x, ebx=0x%08x, ecx=0x%08x",
85                 rh->eax, rh->ebx, rh->ecx);
86     trace_log("  edx=0x%08x, ebp=0x%08x",
87                 rh->edx, rh->ebp);
88     trace_log("   ds=0x%04x, edi=0x%08x",
89                 rh->ds, rh->edi);
90     trace_log("   es=0x%04x, esi=0x%08x",
91                 rh->es, rh->esi);
92     trace_log("   fs=0x%04x, gs=0x%x",
93                 rh->fs, rh->gs);
94     trace_log("   cs=0x%04x, ip=0x%08x",
95                 ep->cs, ep->eip);
96     trace_log("  [ss=0x%04x],sp=0x%08x",
97                 ep->ss, ep->esp);
98     trace_log("  eflags=0x%08x",
99                 ep->eflags);
100 }
101
102 #endif