add validator to restrict the flexibility of LConfig
[lunaix-os.git] / lunaix-os / arch / LConfig
index 22f96c0df165370c1a092dc815f2e26d6b5df6da..bb22a10bc6e42b247e872c263373c8a97855494b 100644 (file)
@@ -1,34 +1,51 @@
-include("x86/LConfig")
+from . import x86
 
-@Collection
+@"Platform"
 def architecture_support():
     """
         Config ISA related features
     """
 
-    @Term
-    def arch():
-        """ Config ISA support """
-        type(["i386", "x86_64", "aarch64", "rv64"])
-        default("i386")
+    @flag
+    def arch_x86_32() -> bool:
+        when(arch is "i386")
+    
+    @flag
+    def arch_x86_64() -> bool:
+        when(arch is "x86_64")
+    
+    @flag
+    def arch_x86() -> bool:
+        when(arch is "i386")
+        when(arch is "x86_64")
 
-        env_val = env("ARCH")
-        if env_val is not None:
-            set_value(env_val)
+    @"Architecture"
+    def arch() -> "i386" | "x86_64":
+        """ 
+            Config ISA support 
+        """
+        _arch = env("ARCH")
+        return _arch if _arch else "x86_64"
 
-    @Term
-    @ReadOnly
-    def arch_bits():
-        type(["64", "32"])
-        match v(arch):
+    @"Base operand size"
+    @readonly
+    def arch_bits() -> 32 | 64:
+        """ 
+            Defines the base size of a general register of the 
+            current selected ISA.
+
+            This the 'bits' part when we are talking about a CPU
+        """
+
+        match arch.val:
             case "i386": 
-                default("32")
+                return 32
             case "aarch64": 
-                default("64")
+                return 64
             case "rv64": 
-                default("64")
+                return 64
             case "x86_64": 
-                default("64")
+                return 64
             case _:
-                default("32")
+                return 32
         
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