#include <hal/apic.h>
#include <hal/rtc.h>
+#include <lunaix/isrm.h>
#include <lunaix/mm/cake.h>
#include <lunaix/mm/valloc.h>
#include <lunaix/sched.h>
#include <lunaix/syslog.h>
#include <lunaix/timer.h>
+#include <hal/acpi/acpi.h>
+
#define LVT_ENTRY_TIMER(vector, mode) (LVT_DELIVERY_FIXED | mode | vector)
LOG_MODULE("TIMER");
// Don't optimize them! Took me an half hour to figure that out...
-static volatile uint32_t rtc_counter = 0;
+static volatile u32_t rtc_counter = 0;
static volatile uint8_t apic_timer_done = 0;
-static volatile uint32_t sched_ticks = 0;
-static volatile uint32_t sched_ticks_counter = 0;
+static volatile u32_t sched_ticks = 0;
+static volatile u32_t sched_ticks_counter = 0;
static struct cake_pile* timer_pile;
assert_msg(timer_ctx, "Fail to initialize timer contex");
timer_ctx->active_timers = (struct lx_timer*)cake_grab(timer_pile);
- llist_init_head(timer_ctx->active_timers);
+ llist_init_head(&timer_ctx->active_timers->link);
}
void
-timer_init(uint32_t frequency)
+timer_init(u32_t frequency)
{
timer_init_context();
// Setup APIC timer
+ // Remap the IRQ 8 (rtc timer's vector) to RTC_TIMER_IV in ioapic
+ // (Remarks IRQ 8 is pin INTIN8)
+ // See IBM PC/AT Technical Reference 1-10 for old RTC IRQ
+ // See Intel's Multiprocessor Specification for IRQ - IOAPIC INTIN
+ // mapping config.
+
+ // grab ourselves these irq numbers
+ u32_t iv_rtc = isrm_bindirq(PC_AT_IRQ_RTC, temp_intr_routine_rtc_tick);
+ u32_t iv_timer = isrm_ivexalloc(temp_intr_routine_apic_timer);
+
// Setup a one-shot timer, we will use this to measure the bus speed. So we
// can then calibrate apic timer to work at *nearly* accurate hz
apic_write_reg(APIC_TIMER_LVT,
- LVT_ENTRY_TIMER(APIC_TIMER_IV, LVT_TIMER_ONESHOT));
+ LVT_ENTRY_TIMER(iv_timer, LVT_TIMER_ONESHOT));
// Set divider to 64
apic_write_reg(APIC_TIMER_DCR, APIC_TIMER_DIV64);
rtc_counter = 0;
apic_timer_done = 0;
- intr_subscribe(APIC_TIMER_IV, temp_intr_routine_apic_timer);
- intr_subscribe(RTC_TIMER_IV, temp_intr_routine_rtc_tick);
-
rtc_enable_timer(); // start RTC timer
apic_write_reg(APIC_TIMER_ICR, APIC_CALIBRATION_CONST); // start APIC timer
assert_msg(timer_ctx->base_frequency, "Fail to initialize timer (NOFREQ)");
- kprintf(KINFO "Base frequency: %u Hz\n", timer_ctx->base_frequency);
+ kprintf(
+ KINFO "hw: %u Hz; os: %u Hz\n", timer_ctx->base_frequency, frequency);
timer_ctx->running_frequency = frequency;
timer_ctx->tphz = timer_ctx->base_frequency / frequency;
// cleanup
- intr_unsubscribe(APIC_TIMER_IV, temp_intr_routine_apic_timer);
- intr_unsubscribe(RTC_TIMER_IV, temp_intr_routine_rtc_tick);
+ isrm_ivfree(iv_timer);
+ isrm_ivfree(iv_rtc);
- apic_write_reg(APIC_TIMER_LVT,
- LVT_ENTRY_TIMER(APIC_TIMER_IV, LVT_TIMER_PERIODIC));
- intr_subscribe(APIC_TIMER_IV, timer_update);
+ apic_write_reg(
+ APIC_TIMER_LVT,
+ LVT_ENTRY_TIMER(isrm_ivexalloc(timer_update), LVT_TIMER_PERIODIC));
apic_write_reg(APIC_TIMER_ICR, timer_ctx->tphz);
}
struct lx_timer*
-timer_run_second(uint32_t second,
+timer_run_second(u32_t second,
void (*callback)(void*),
void* payload,
uint8_t flags)
}
struct lx_timer*
-timer_run_ms(uint32_t millisecond,
+timer_run_ms(u32_t millisecond,
void (*callback)(void*),
void* payload,
uint8_t flags)
timer->payload = payload;
timer->flags = flags;
- llist_append(timer_ctx->active_timers, &timer->link);
+ llist_append(&timer_ctx->active_timers->link, &timer->link);
return timer;
}
}
}
-void
-sched_yield()
-{
- sched_ticks_counter = sched_ticks;
-}
-
static void
temp_intr_routine_rtc_tick(const isr_param* param)
{