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fix: incorrect settings of msi registers.
author
Minep
<zelong56@gmail.com>
Tue, 9 Aug 2022 14:25:19 +0000
(15:25 +0100)
committer
Minep
<zelong56@gmail.com>
Tue, 9 Aug 2022 14:25:19 +0000
(15:25 +0100)
fix: enable correct hba interrupt for indicating end of transfer.
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git://scm.lunaixsky.com / lunaix-os.git / commitdiff