#define __ASM__ 1
-#include <arch/x86/boot/multiboot.h>
+#include <arch/i386/boot/multiboot.h>
#define MB_FLAGS (MULTIBOOT_MEMORY_INFO | MULTIBOOT_PAGE_ALIGN)
#define KPG_SIZE 10*4096
.long MB_FLAGS
.long CHECKSUM(MB_FLAGS)
-.section .bss
+.section .hhk_init_bss
.global mb_info
.align 16
/* 为Multiboot info struct 预留空间 */
.skip KPG_SIZE, 0
-.section .hhk_init
+.section .hhk_init_text
.global start_
.type start_, @function /* Optional, this just give the
* linker more knowledge about the label
/*
将咱们的 multiboot_info 挪个地儿，就是上述预留的空间里
- 而后在_hhk_init里，我们会对所有的高半核初始化代码（arch/x86下的所有）进行Identity map
+ 而后在_hhk_init里，我们会对所有的高半核初始化代码（arch/i386下的所有）进行Identity map
这样，我们能够保证当分页与虚拟地址开启后，我们的内核能够访问到multiboot info table
*/
-#include <arch/x86/boot/multiboot.h>
-#include <arch/x86/idt.h>
+#include <arch/i386/boot/multiboot.h>
+#include <arch/i386/idt.h>
#include <lunaix/common.h>
#include <lunaix/mm/page.h>
extern u8_t __init_hhk_end;
extern u8_t _k_stack;
-void
+#define boot_text __attribute__((section(".hhk_init_text")))
+#define boot_data __attribute__((section(".hhk_init_data")))
+
+void boot_text
_init_page(x86_page_table* ptd)
{
ptd->entry[0] = NEW_L1_ENTRY(PG_PREM_RW, (ptd_t*)ptd + PG_MAX_ENTRIES);
ptd->entry[PG_MAX_ENTRIES - 1] = NEW_L1_ENTRY(T_SELF_REF_PERM, ptd);
}
-u32_t
+u32_t boot_text
__save_subset(u8_t* destination, u8_t* base, unsigned int size)
{
unsigned int i = 0;
return i;
}
-void
+void boot_text
_save_multiboot_info(multiboot_info_t* info, u8_t* destination)
{
u32_t current = 0;
}
}
-void
+void boot_text
_hhk_init(x86_page_table* ptd, u32_t kpg_size)
{
--- /dev/null
+#include <arch/i386/vectors.h>
+#include <cpuid.h>
+#include <hal/cpu.h>
+#include <lunaix/types.h>
+
+#define BRAND_LEAF 0x80000000UL
+
+void
+cpu_get_model(char* model_out)
+{
+ u32_t* out = (u32_t*)model_out;
+ u32_t eax = 0, ebx = 0, edx = 0, ecx = 0;
+
+ __get_cpuid(0, &eax, &ebx, &ecx, &edx);
+
+ out[0] = ebx;
+ out[1] = edx;
+ out[2] = ecx;
+ model_out[12] = '\0';
+}
+
+int
+cpu_brand_string_supported()
+{
+ u32_t supported = __get_cpuid_max(BRAND_LEAF, 0);
+ return (supported >= 0x80000004UL);
+}
+
+void
+cpu_get_id(char* id_out)
+{
+ if (!cpu_brand_string_supported()) {
+ id_out[0] = '?';
+ id_out[1] = '\0';
+ }
+ u32_t* out = (u32_t*)id_out;
+ u32_t eax = 0, ebx = 0, edx = 0, ecx = 0;
+ for (u32_t i = 2, j = 0; i < 5; i++) {
+ __get_cpuid(BRAND_LEAF + i, &eax, &ebx, &ecx, &edx);
+ out[j] = eax;
+ out[j + 1] = ebx;
+ out[j + 2] = ecx;
+ out[j + 3] = edx;
+ j += 4;
+ }
+ id_out[48] = '\0';
+}
+
+u32_t
+cpu_ldstate()
+{
+ ptr_t val;
+ asm volatile("pushf\n"
+ "popl %0\n"
+ : "=r"(val)::);
+ return val;
+}
+
+u32_t
+cpu_ldconfig()
+{
+ ptr_t val;
+ asm volatile("movl %%cr0,%0" : "=r"(val));
+ return val;
+}
+
+void
+cpu_chconfig(u32_t val)
+{
+ asm("mov %0, %%cr0" ::"r"(val));
+}
+
+u32_t
+cpu_ldvmspace()
+{
+ ptr_t val;
+ asm volatile("movl %%cr3,%0" : "=r"(val));
+ return val;
+}
+
+void
+cpu_chvmspace(u32_t val)
+{
+ asm("mov %0, %%cr3" ::"r"(val));
+}
+
+void
+cpu_flush_page(ptr_t va)
+{
+ asm volatile("invlpg (%0)" ::"r"(va) : "memory");
+}
+
+void
+cpu_flush_vmspace()
+{
+ asm("movl %%cr3, %%eax\n"
+ "movl %%eax, %%cr3" ::
+ : "eax");
+}
+
+void
+cpu_enable_interrupt()
+{
+ asm volatile("sti");
+}
+
+void
+cpu_disable_interrupt()
+{
+ asm volatile("cli");
+}
+
+void
+cpu_trap_sched()
+{
+ asm("int %0" ::"i"(LUNAIX_SCHED));
+}
+
+void
+cpu_trap_panic(char* message)
+{
+ asm("int %0" ::"i"(LUNAIX_SYS_PANIC), "D"(message));
+}
+
+void
+cpu_wait()
+{
+ asm("hlt");
+}
+
+ptr_t
+cpu_ldeaddr()
+{
+ ptr_t val;
+ asm volatile("movl %%cr2,%0" : "=r"(val));
+ return val;
+}
+
+void
+cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low)
+{
+ u32_t h = 0, l = 0;
+ asm volatile("rdmsr" : "=d"(h), "=a"(l) : "c"(msr_idx));
+
+ *reg_high = h;
+ *reg_low = l;
+}
+
+void
+cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low)
+{
+ asm volatile("wrmsr" : : "d"(reg_high), "a"(reg_low), "c"(msr_idx));
+}
\ No newline at end of file
#include <hal/pic.h>
#include <hal/rtc.h>
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/mm/mmio.h>
#include <lunaix/spike.h>
// Make sure the APIC is there
// FUTURE: Use 8259 as fallback
- assert_msg(cpu_has_apic(), "No APIC detected!");
+
+ // FIXME apic abstraction as local interrupt controller
+ // assert_msg(cpu_has_apic(), "No APIC detected!");
// As we are going to use APIC, disable the old 8259 PIC
pic_disable();
+++ /dev/null
-#include <cpuid.h>
-#include <hal/cpu.h>
-#include <hal/rnd.h>
-#include <stdint.h>
-
-void
-cpu_get_model(char* model_out)
-{
- u32_t* out = (u32_t*)model_out;
- reg32 eax = 0, ebx = 0, edx = 0, ecx = 0;
-
- __get_cpuid(0, &eax, &ebx, &ecx, &edx);
-
- out[0] = ebx;
- out[1] = edx;
- out[2] = ecx;
- model_out[12] = '\0';
-}
-
-#define BRAND_LEAF 0x80000000UL
-
-int
-cpu_brand_string_supported()
-{
- reg32 supported = __get_cpuid_max(BRAND_LEAF, 0);
- return (supported >= 0x80000004UL);
-}
-
-void
-cpu_get_brand(char* brand_out)
-{
- if (!cpu_brand_string_supported()) {
- brand_out[0] = '?';
- brand_out[1] = '\0';
- }
- u32_t* out = (u32_t*)brand_out;
- reg32 eax = 0, ebx = 0, edx = 0, ecx = 0;
- for (u32_t i = 2, j = 0; i < 5; i++) {
- __get_cpuid(BRAND_LEAF + i, &eax, &ebx, &ecx, &edx);
- out[j] = eax;
- out[j + 1] = ebx;
- out[j + 2] = ecx;
- out[j + 3] = edx;
- j += 4;
- }
- brand_out[48] = '\0';
-}
-
-int
-cpu_has_apic()
-{
- // reference: Intel manual, section 10.4.2
- reg32 eax = 0, ebx = 0, edx = 0, ecx = 0;
- __get_cpuid(1, &eax, &ebx, &ecx, &edx);
-
- return (edx & 0x100);
-}
-
-void
-cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low)
-{
- u32_t h = 0, l = 0;
- asm volatile("rdmsr" : "=d"(h), "=a"(l) : "c"(msr_idx));
-
- *reg_high = h;
- *reg_low = l;
-}
-
-void
-cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low)
-{
- asm volatile("wrmsr" : : "d"(reg_high), "a"(reg_low), "c"(msr_idx));
-}
-
-int
-rnd_is_supported()
-{
- reg32 eax = 0, ebx = 0, ecx = 0, edx = 0;
- __get_cpuid(0x01, &eax, &ebx, &ecx, &edx);
- return (ecx & (1 << 30));
-}
\ No newline at end of file
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <hal/acpi/acpi.h>
#include <hal/ioapic.h>
#include <lunaix/common.h>
#endif
#ifdef __ARCH_IA32
- #include "x86/i386_asm.h"
+ #include "i386/i386_asm.h"
#ifndef __ASM__
- #include "x86/i386_abi.h"
+ #include "i386/i386_abi.h"
#endif
#endif
#define store_retval_to(proc, retval) (proc)->intr_ctx->registers.eax = (retval)
+#define eret_target(proc) (proc)->intr_ctx->execp->eip
+#define eret_stack(proc) (proc)->intr_ctx->execp->esp
+#define intr_ivec(proc) (proc)->intr_ctx->execp->vector
+#define intr_ierr(proc) (proc)->intr_ctx->execp->err_code
+
#define j_usr(sp, pc) \
asm volatile("movw %0, %%ax\n" \
"movw %%ax, %%es\n" \
struct regcontext
{
- reg32 eax;
- reg32 ebx;
- reg32 ecx;
- reg32 edx;
- reg32 edi;
- reg32 ebp;
- reg32 esi;
- reg32 ds;
- reg32 es;
- reg32 fs;
- reg32 gs;
+ u32_t eax;
+ u32_t ebx;
+ u32_t ecx;
+ u32_t edx;
+ u32_t edi;
+ u32_t ebp;
+ u32_t esi;
+ u32_t ds;
+ u32_t es;
+ u32_t fs;
+ u32_t gs;
} __attribute__((packed));
typedef struct
struct regcontext registers;
union
{
- reg32 esp;
+ u32_t esp;
volatile struct exec_param* execp;
};
} __attribute__((packed)) isr_param;
#ifndef __LUNAIX_ACPI_ACPI_H
#define __LUNAIX_ACPI_ACPI_H
-#include <arch/x86/boot/multiboot.h>
+#include <arch/i386/boot/multiboot.h>
#include <stddef.h>
#include <stdint.h>
#include <lunaix/types.h>
-#define SEL_RPL(selector) ((selector)&0x3)
-
-typedef unsigned int reg32;
-typedef unsigned short reg16;
-
-typedef struct
-{
- reg32 eax;
- reg32 ebx;
- reg32 ecx;
- reg32 edx;
- reg32 edi;
- reg32 ebp;
- reg32 esi;
- reg32 esp;
-} __attribute__((packed)) gp_regs;
-
-typedef struct
-{
- reg16 ds;
- reg16 es;
- reg16 fs;
- reg16 gs;
-} __attribute__((packed)) sg_reg;
+/**
+ * @brief Get processor ID string
+ *
+ * @param id_out
+ */
+void
+cpu_get_id(char* id_out);
+
+/**
+ * @brief Load current processor state
+ *
+ * @return u32_t
+ */
+u32_t
+cpu_ldstate();
+
+/**
+ * @brief Load current processor config
+ *
+ * @return u32_t
+ */
+u32_t
+cpu_ldconfig();
+
+/**
+ * @brief Change current processor state
+ *
+ * @return u32_t
+ */
+void
+cpu_chconfig(u32_t val);
+
+/**
+ * @brief Load current virtual memory space
+ *
+ * @return u32_t
+ */
+u32_t
+cpu_ldvmspace();
+
+/**
+ * @brief Change current virtual memory space
+ *
+ * @return u32_t
+ */
+void
+cpu_chvmspace(u32_t val);
+
+/**
+ * @brief Flush TLB
+ *
+ * @return u32_t
+ */
+void
+cpu_flush_page(ptr_t va);
+
+void
+cpu_flush_vmspace();
+
+void
+cpu_enable_interrupt();
+
+void
+cpu_disable_interrupt();
void
-cpu_get_brand(char* brand_out);
-
-int
-cpu_has_apic();
-
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wreturn-type"
-static inline reg32
-cpu_rcr0()
-{
- ptr_t val;
- asm volatile("movl %%cr0,%0" : "=r"(val));
- return val;
-}
-
-static inline reg32
-cpu_rcr2()
-{
- ptr_t val;
- asm volatile("movl %%cr2,%0" : "=r"(val));
- return val;
-}
-
-static inline reg32
-cpu_rcr3()
-{
- ptr_t val;
- asm volatile("movl %%cr3,%0" : "=r"(val));
- return val;
-}
-
-static inline reg32
-cpu_rcr4()
-{
- ptr_t val;
- asm volatile("movl %%cr4,%0" : "=r"(val));
- return val;
-}
-
-static inline reg32
-cpu_reflags()
-{
- ptr_t val;
- asm volatile("pushf\n"
- "popl %0\n"
- : "=r"(val)::);
- return val;
-}
-#pragma GCC diagnostic pop
-
-static inline void
-cpu_lcr0(reg32 v)
-{
- asm("mov %0, %%cr0" ::"r"(v));
-}
-
-static inline void
-cpu_lcr2(reg32 v)
-{
- asm("mov %0, %%cr2" ::"r"(v));
-}
-
-static inline void
-cpu_lcr3(reg32 v)
-{
- asm("mov %0, %%cr3" ::"r"(v));
-}
-
-static inline void
-cpu_invplg(ptr_t va)
-{
- asm volatile("invlpg (%0)" ::"r"(va) : "memory");
-}
-
-static inline void
-cpu_enable_interrupt()
-{
- asm volatile("sti");
-}
-
-static inline void
-cpu_disable_interrupt()
-{
- asm volatile("cli");
-}
-
-static inline void
-cpu_invtlb()
-{
- reg32 interm;
- asm("movl %%cr3, %0\n"
- "movl %0, %%cr3"
- : "=r"(interm)
- : "r"(interm));
-}
-
-static inline void
-cpu_int(int vect)
-{
- asm("int %0" ::"i"(vect));
-}
+cpu_trap_sched();
void
-cpu_rdmsr(u32_t msr_idx, u32_t* reg_high, u32_t* reg_low);
+cpu_trap_panic(char* message);
void
-cpu_wrmsr(u32_t msr_idx, u32_t reg_high, u32_t reg_low);
+cpu_wait();
-static inline void
-cpu_ldvmspace(ptr_t vms)
-{
- cpu_lcr3(vms);
-}
+ptr_t
+cpu_ldeaddr();
-#endif
\ No newline at end of file
+#endif /* __LUNAIX_CPU_H */
--- /dev/null
+#ifndef __LUNAIX_COMPILER_H
+#define __LUNAIX_COMPILER_H
+
+#define likely(x) __builtin_expect((x), 1)
+
+#define weak_alias(name) __attribute__((weak, alias(name)))
+
+#endif /* __LUNAIX_COMPILER_H */
#ifndef __LUNAIX_ISRM_H
#define __LUNAIX_ISRM_H
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/types.h>
#define IV_BASE 32
#ifndef __LUNAIX_PROCESS_H
#define __LUNAIX_PROCESS_H
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/clock.h>
#include <lunaix/ds/waitq.h>
#include <lunaix/fs.h>
{
/*
Any change to *critical section*, including layout, size
- must be reflected in arch/x86/interrupt.S.inc to avoid
+ must be reflected in arch/i386/interrupt.S.inc to avoid
disaster!
*/
void
proc_clear_signal(struct proc_info* proc);
+// enable interrupt upon transfer
+#define TRANSFER_IE 1
+
+void
+proc_init_transfer(struct proc_info* proc, ptr_t stop, ptr_t target, int flags);
+
#endif /* __LUNAIX_PROCESS_H */
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
-#define likely(x) __builtin_expect((x), 1)
-
/**
* @brief Fast log base 2 for integer, utilizing constant unfolding.
* Adopted from
#ifndef __LUNAIX_SYSCALL_H
#define __LUNAIX_SYSCALL_H
-#include <arch/x86/vectors.h>
+#include <arch/i386/vectors.h>
#include <usr/lunaix/syscallid.h>
#ifndef __ASM__
#ifndef __LUNAIX_TYPES_H
#define __LUNAIX_TYPES_H
+#include <lunaix/compiler.h>
#include <stdarg.h>
#include <stddef.h>
#include <usr/lunaix/types.h>
#ifndef __LUNAIX_GDBSTUB_H
#define __LUNAIX_GDBSTUB_H
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
void
gdbstub_loop(isr_param* param);
#ifndef __LUNAIX_LSDBG_H
#define __LUNAIX_LSDBG_H
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#define SDBG_CLNT_HI 0x10
#define SDBG_CLNT_QUIT 0xff
-#include <arch/x86/gdt.h>
-#include <arch/x86/tss.h>
+#include <arch/i386/gdt.h>
+#include <arch/i386/tss.h>
#include <lunaix/types.h>
#define GDT_ENTRY 6
#define __ASM__
-#include <arch/x86/interrupts.h>
-#include <arch/x86/i386_asm.h>
-#include <arch/x86/tss.h>
+#include <arch/i386/interrupts.h>
+#include <arch/i386/i386_asm.h>
+#include <arch/i386/tss.h>
#include <lunaix/syscall.h>
-#include <arch/x86/interrupt.S.inc>
+#include <arch/i386/interrupt.S.inc>
#define __ASM_INTR_DIAGNOSIS
-#include <arch/x86/interrupts.h>
-#include <arch/x86/tss.h>
+#include <arch/i386/interrupts.h>
+#include <arch/i386/tss.h>
#include <hal/apic.h>
#include <hal/cpu.h>
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/isrm.h>
#include <lunaix/lxconsole.h>
-#include <arch/x86/idt.h>
-#include <arch/x86/intrhnds.h>
+#include <arch/i386/idt.h>
+#include <arch/i386/intrhnds.h>
#include <lunaix/types.h>
#define IDT_ENTRY 256
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/common.h>
#include <lunaix/mm/mm.h>
#include <lunaix/mm/pmm.h>
intr_routine_page_fault(const isr_param* param)
{
uint32_t errcode = param->execp->err_code;
- ptr_t ptr = cpu_rcr2();
+ ptr_t ptr = cpu_ldeaddr();
if (!ptr) {
goto segv_term;
}
goto segv_term;
}
- if (!SEL_RPL(param->execp->cs)) {
- // TODO if kernel pfault
- }
+ // XXX do kernel trigger pfault?
vm_regions_t* vmr = (vm_regions_t*)&__current->mm.regions;
struct mm_region* hit_region = region_get(vmr, ptr);
}
if ((hit_region->attr & COW_MASK) == COW_MASK) {
// normal page fault, do COW
- cpu_invplg((ptr_t)pte);
+ cpu_flush_page((ptr_t)pte);
ptr_t pa = (ptr_t)vmm_dup_page(__current->pid, PG_ENTRY_ADDR(*pte));
// -> a new page need to be alloc
if ((hit_region->attr & REGION_ANON)) {
if (!PG_IS_PRESENT(*pte)) {
- cpu_invplg((ptr_t)pte);
+ cpu_flush_page((ptr_t)pte);
ptr_t pa = pmm_alloc_page(__current->pid, 0);
if (!pa) {
goto oom;
}
- cpu_invplg((ptr_t)pte);
+ cpu_flush_page((ptr_t)pte);
*pte = (*pte & 0xFFF) | pa | get_ptattr(hit_region);
memset((void*)ptr, 0, PG_SIZE);
;
resolved:
- cpu_invplg(ptr);
+ cpu_flush_page(ptr);
return;
}
\ No newline at end of file
--- /dev/null
+#include <lunaix/process.h>
+
+void
+proc_init_transfer(struct proc_info* proc,
+ ptr_t stack_top,
+ ptr_t target,
+ int flags)
+{
+ struct exec_param* execp =
+ (struct exec_param*)(stack_top - sizeof(struct exec_param));
+ isr_param* isrp = (isr_param*)((ptr_t)execp - sizeof(isr_param));
+
+ *execp = (struct exec_param){
+ .cs = KCODE_SEG, .ss = KDATA_SEG, .eip = target, .eflags = cpu_ldstate()
+ };
+
+ *isrp = (isr_param){ .registers = { .ds = KDATA_SEG,
+ .es = KDATA_SEG,
+ .fs = KDATA_SEG,
+ .gs = KDATA_SEG },
+ .execp = execp };
+
+ if ((flags & TRANSFER_IE)) {
+ execp->eflags |= 0x200;
+ }
+
+ proc->intr_ctx = isrp;
+}
\ No newline at end of file
/* 高半核入口点 - 0xC0000000 */
#define __ASM__
-#include <arch/x86/i386_asm.h>
+#include <arch/i386/i386_asm.h>
.section .text
.global hhk_entry_
-#include <arch/x86/tss.h>
+#include <arch/i386/tss.h>
#include <lunaix/common.h>
#include <lunaix/process.h>
int
__rand_rd_pg(struct device* dev, void* buf, size_t offset)
{
- rnd_fill(buf, PG_SIZE);
+ // rnd_fill(buf, PG_SIZE);
return PG_SIZE;
}
int
__rand_rd(struct device* dev, void* buf, size_t offset, size_t len)
{
- rnd_fill(buf, len);
+ // rnd_fill(buf, len);
return len;
}
void
devbuiltin_init_rand()
{
- if (!rnd_is_supported()) {
+ // TODO rnd device need better abstraction
+ if (1) {
kprintf(KWARN "not supported.\n");
return;
}
// we will jump to new entry point (_u_start) upon syscall's
// return so execve 'will not return' from the perspective of it's invoker
- volatile struct exec_param* execp = __current->intr_ctx->execp;
- execp->esp = container.stack_top;
- execp->eip = container.exe.entry;
+ eret_target(__current) = container.exe.entry;
+ eret_stack(__current) = container.stack_top;
// these become meaningless once execved!
__current->ustack_top = 0;
#include <lunaix/tty/tty.h>
#include <lunaix/types.h>
-#include <arch/x86/boot/multiboot.h>
-#include <arch/x86/idt.h>
-#include <arch/x86/interrupts.h>
+#include <arch/abi.h>
+#include <arch/i386/boot/multiboot.h>
+#include <arch/i386/interrupts.h>
#include <klibc/stdio.h>
#include <klibc/string.h>
proc0->page_table = vmm_dup_vmspace(proc0->pid);
// 直接切换到新的拷贝，进行配置。
- cpu_ldvmspace(proc0->page_table);
+ cpu_chvmspace(proc0->page_table);
// 为内核创建一个专属栈空间。
for (size_t i = 0; i < (KSTACK_SIZE >> PG_SIZE_BITS); i++) {
VMAP_NULL);
}
- struct exec_param* execp =
- (struct exec_param*)(KSTACK_TOP - sizeof(struct exec_param));
- isr_param* isrp = (isr_param*)((ptr_t)execp - sizeof(isr_param));
-
- *execp = (struct exec_param){ .cs = KCODE_SEG,
- .eip = (ptr_t)__proc0,
- .ss = KDATA_SEG,
- .eflags = cpu_reflags() };
- *isrp = (isr_param){ .registers = { .ds = KDATA_SEG,
- .es = KDATA_SEG,
- .fs = KDATA_SEG,
- .gs = KDATA_SEG },
- .execp = execp };
-
- proc0->intr_ctx = isrp;
+ proc_init_transfer(proc0, KSTACK_TOP, (ptr_t)__proc0, 0);
// 向调度器注册进程。
commit_process(proc0);
*mapping.pte &= ~PG_DIRTY;
- cpu_invplg((ptr_t)mapping.pte);
+ cpu_flush_page((ptr_t)mapping.pte);
} else if ((options & MS_INVALIDATE)) {
goto invalidate;
}
invalidate:
*mapping.pte &= ~PG_PRESENT;
pmm_free_page(KERNEL_PID, mapping.pa);
- cpu_invplg((ptr_t)mapping.pte);
+ cpu_flush_page((ptr_t)mapping.pte);
}
}
NEW_L1_ENTRY(attr | PG_WRITE | PG_PRESENT, new_l1pt_pa);
// make sure our new l2 table is visible to CPU
- cpu_invplg((ptr_t)l2pt);
+ cpu_flush_page((ptr_t)l2pt);
memset((void*)l2pt, 0, PG_SIZE);
} else {
}
if (mnt == VMS_SELF) {
- cpu_invplg(va);
+ cpu_flush_page(va);
}
if ((options & VMAP_NOMAP)) {
x86_page_table* l2pt = (x86_page_table*)(mnt | (l1_index << 12));
x86_pte_t l2pte = l2pt->entry[l2_index];
- cpu_invplg(va);
+ cpu_flush_page(va);
l2pt->entry[l2_index] = PTE_NULL;
return PG_ENTRY_ADDR(l2pte);
{
x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
l1pt->entry[(mnt >> 22)] = NEW_L1_ENTRY(T_SELF_REF_PERM, pde);
- cpu_invplg(mnt);
+ cpu_flush_page(mnt);
return mnt;
}
{
x86_page_table* l1pt = (x86_page_table*)L1_BASE_VADDR;
l1pt->entry[(mnt >> 22)] = 0;
- cpu_invplg(mnt);
+ cpu_flush_page(mnt);
return mnt;
}
\ No newline at end of file
#include <lunaix/syslog.h>
#include <lunaix/timer.h>
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <hal/cpu.h>
#include <klibc/string.h>
#include <hal/pci.h>
#include <hal/rtc.h>
-#include <arch/x86/boot/multiboot.h>
+#include <arch/i386/boot/multiboot.h>
#include <klibc/string.h>
x86_pte_t* curproc = &PTE_MOUNTED(VMS_SELF, i);
x86_pte_t* newproc = &PTE_MOUNTED(VMS_MOUNT_1, i);
- cpu_invplg((ptr_t)newproc);
+ cpu_flush_page((ptr_t)newproc);
if ((attr & REGION_MODE_MASK) == REGION_RSHARED) {
// 如果读共享，则将两者的都标注为只读，那么任何写入都将会应用COW策略。
- cpu_invplg((ptr_t)curproc);
- cpu_invplg((ptr_t)(i << 12));
+ cpu_flush_page((ptr_t)curproc);
+ cpu_flush_page((ptr_t)(i << 12));
*curproc = *curproc & ~PG_WRITE;
*newproc = *newproc & ~PG_WRITE;
In the name of Celestia our glorious goddess, I will fucking HATE
the TLB for the rest of my LIFE!
*/
- cpu_invplg((ptr_t)ppte);
+ cpu_flush_page((ptr_t)ppte);
x86_pte_t p = *ppte;
ptr_t ppa = vmm_dup_page(pid, PG_ENTRY_ADDR(p));
#include <arch/abi.h>
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <hal/apic.h>
#include <hal/cpu.h>
extern void my_dummy();
static char dummy_stack[DUMMY_STACK_SIZE] __attribute__((aligned(16)));
- struct exec_param* execp =
- (void*)dummy_stack + DUMMY_STACK_SIZE - sizeof(struct exec_param);
+ ptr_t stktop = (ptr_t)dummy_stack + DUMMY_STACK_SIZE;
- isr_param* isrp = (void*)execp - sizeof(isr_param);
-
- *execp = (struct exec_param){
- .cs = KCODE_SEG,
- .eflags = cpu_reflags() | 0x0200,
- .eip = (ptr_t)my_dummy,
- .ss = KDATA_SEG,
- };
-
- *isrp = (isr_param){ .registers = { .ds = KDATA_SEG,
- .es = KDATA_SEG,
- .fs = KDATA_SEG,
- .gs = KDATA_SEG },
- .execp = execp };
-
- // memset to 0
dummy_proc = (struct proc_info){};
- dummy_proc.intr_ctx = isrp;
- dummy_proc.page_table = cpu_rcr3();
+ proc_init_transfer(&dummy_proc, stktop, (ptr_t)my_dummy, TRANSFER_IE);
+
+ dummy_proc.page_table = cpu_ldvmspace();
dummy_proc.state = PS_READY;
dummy_proc.parent = &dummy_proc;
dummy_proc.pid = KERNEL_PID;
sched_yieldk()
{
cpu_enable_interrupt();
- cpu_int(LUNAIX_SCHED);
+ cpu_trap_sched();
}
__DEFINE_LXSYSCALL1(unsigned int, sleep, unsigned int, seconds)
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <klibc/stdio.h>
#include <lunaix/spike.h>
// This is a convention we made that the LUNAIX_SYS_PANIC syscall will
// print the panic message passed via %edi. (see
// kernel/asm/x86/interrupts.c)
- asm("int %0" ::"i"(LUNAIX_SYS_PANIC), "D"(buffer));
+ cpu_trap_panic(buffer);
DO_SPIN // never reach
}
void
panick(const char* msg)
{
- asm("int %0" ::"i"(LUNAIX_SYS_PANIC), "D"(msg));
+ cpu_trap_panic(msg);
DO_SPIN
}
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <lunaix/isrm.h>
#include <lunaix/process.h>
#include <lunaix/sched.h>
* @copyright Copyright (c) 2022
*
*/
-#include <arch/x86/interrupts.h>
+#include <arch/i386/interrupts.h>
#include <hal/apic.h>
#include <hal/rtc.h>
. = 0x100000;
/* 这里是我们的高半核初始化代码段和数据段 */
-
.hhk_init_text BLOCK(4K) : {
- * (.multiboot)
- arch/*.o (.hhk_init)
- arch/*.o (.text)
+ *(.multiboot)
+ *(.hhk_init_text)
}
.hhk_init_bss BLOCK(4K) : {
- arch/*.o (.bss)
+ *(.hhk_init_bss)
}
.hhk_init_data BLOCK(4K) : {
- arch/*.o (.data)
+ *(.hhk_init_data)
}
.hhk_init_rodata BLOCK(4K) : {
- arch/*.o (.rodata)
+ *(.hhk_init_rodata)
}
__init_hhk_end = ALIGN(4K);
__kernel_start = .;
PROVIDE(__ktext_start = .);
- kernel/*.o (.text)
- hal/*.o (.text)
- debug/*.o (.text)
- libs/*.o (.text)
+ *(.text)
PROVIDE(__ktext_end = .);
}
.data BLOCK(4K) : AT ( ADDR(.data) - 0xC0000000 ) {
- kernel/*.o (.data)
- hal/*.o (.data)
- debug/*.o (.data)
- libs/*.o (.data)
+ *(.data)
}
.rodata BLOCK(4K) : AT ( ADDR(.rodata) - 0xC0000000 ) {
- kernel/*.o (.rodata)
- hal/*.o (.rodata)
- debug/*.o (.rodata)
- libs/*.o (.rodata)
+ *(.rodata)
}
.kpg BLOCK(4K) : AT ( ADDR(.kpg) - 0xC0000000 ) {
- arch/*.o (.kpg)
+ *(.kpg)
}
.bss BLOCK(4K) : AT ( ADDR(.bss) - 0xC0000000 ) {
- kernel/*.o (.bss)
- hal/*.o (.bss)
- debug/*.o (.bss)
- libs/*.o (.bss)
+ *(.bss)
}
__kernel_end = ALIGN(4K);
-fno-cse-skip-blocks\
-fno-optimize-strlen\
-fno-inline-functions-called-once \
- -fno-inline-functions \
-fno-inline-small-functions \
-fno-indirect-inlining
from pathlib import Path
-intr_handler_h = "arch/x86/intrhnds.h"
+intr_handler_h = "arch/i386/intrhnds.h"
intr_handler_c = "kernel/asm/x86/intrhnds.c"
intr_handler_s = "kernel/asm/x86/intrhnds.S"
code = '\n'.join(expr_list)
with cfile.open(mode='w+') as f:
f.write(f'''
-#include <arch/x86/idt.h>
+#include <arch/i386/idt.h>
#include <stdint.h>
#include <{intr_handler_h}>
git://scm.lunaixsky.com / lunaix-os.git / commitdiff