#else
// You know what, I just search the entire 1MiB for Celestia's sake.
uint8_t* mem_start = 0x4000;
- for (size_t j = 0; j < 0x100000; j += 16) {
- uint32_t sig_low = *((uint32_t*)(mem_start + j));
+ for (; mem_start < 0x100000; mem_start += 16) {
+ uint32_t sig_low = *((uint32_t*)(mem_start));
// uint32_t sig_high = *((uint32_t*)(mem_start+j) + 1);
if (sig_low == ACPI_RSDP_SIG_L) {
- rsdp = (acpi_rsdp_t*)(mem_start + j);
+ rsdp = (acpi_rsdp_t*)(mem_start);
break;
}
}
LOG_MODULE("APIC")
-void
-apic_setup_timer();
-
void
apic_setup_lvts();
#include "madt.h"
#define ACPI_RSDP_SIG_L 0x20445352 // 'RSD '
-#define ACPI_RSDP_SIG_H 0x20525450 // 'PTR '
+#define ACPI_RSDP_SIG_H 0x20525450 // 'PTR '
-#define ACPI_MADT_SIG 0x43495041 // 'APIC'
+#define ACPI_MADT_SIG 0x43495041 // 'APIC'
typedef struct {
uint32_t signature_l;
uint32_t signature_h;
uint8_t chksum;
- uint8_t oem_id[6];
+ char oem_id[6];
// Revision
uint8_t rev;
acpi_rsdt_t* rsdt;
acpi_apic_t* apic;
acpi_ioapic_t* ioapic;
acpi_intso_t** irq_exception;
-} acpi_madt_toc_t;
+} __attribute__((packed)) acpi_madt_toc_t;
#endif /* __LUNAIX_ACPI_MADT_H */
#include <lunaix/ds/llist.h>
#include <stdint.h>
-#define SYS_TIMER_FREQUENCY_HZ 2048UL
+#define SYS_TIMER_FREQUENCY_HZ 2048
#define TIMER_MODE_PERIODIC 0x1
vmm_set_mapping(APIC_BASE_VADDR, __APIC_BASE_PADDR, PG_PREM_RW);
vmm_set_mapping(IOAPIC_BASE_VADDR, ioapic_addr, PG_PREM_RW);
- ioapic_init();
apic_init();
+ ioapic_init();
timer_init(SYS_TIMER_FREQUENCY_HZ);
for (size_t i = 256; i < hhk_init_pg_count; i++) {
break;
case '1':
tty_set_theme(VGA_COLOR_BROWN, current_theme >> 12);
- snprintf(expanded_fmt, MAX_XFMT_SIZE, "[%s] (%s) %s", "INFO", component, fmt);
+ snprintf(expanded_fmt, MAX_XFMT_SIZE, "[%s] (%s) %s", "WARN", component, fmt);
break;
case '2':
tty_set_theme(VGA_COLOR_LIGHT_RED, current_theme >> 12);
Timer calibration process - measure the APIC timer base frequency
step 1: setup a temporary isr for RTC timer which trigger at each tick
- (1024Hz) step 2: setup a temporary isr for #APIC_TIMER_IV step 3: setup
- the divider, APIC_TIMER_DCR step 4: Startup RTC timer step 5: Write a
- large value, v, to APIC_TIMER_ICR to start APIC timer (this must be
- followed immediately after step 4) step 6: issue a write to EOI and clean
- up.
+ (1024Hz)
+ step 2: setup a temporary isr for #APIC_TIMER_IV
+ step 3: setup the divider, APIC_TIMER_DCR
+ step 4: Startup RTC timer
+ step 5: Write a large value, v, to APIC_TIMER_ICR to start APIC timer (this must be
+ followed immediately after step 4)
+ step 6: issue a write to EOI and clean up.
When the APIC ICR counting down to 0 #APIC_TIMER_IV triggered, save the
rtc timer's counter, k, and disable RTC timer immediately (although the
timer->payload = payload;
timer->flags = flags;
- llist_append(timer_ctx->active_timers, timer);
+ llist_append(timer_ctx->active_timers, &timer->link);
return 1;
}
if (pos->flags & TIMER_MODE_PERIODIC) {
pos->counter = pos->deadline;
} else {
- llist_delete(pos);
+ llist_delete(&pos->link);
lxfree(pos);
}
}