minor adjustments

diff --git a/lunaix-os/hal/acpi/acpi.c b/lunaix-os/hal/acpi/acpi.c
index a37466a91f0671e3588dede7ef3402e482b9069f..a99827803a14e729bb9b4fdb07591fdd767ad57d 100644 (file)
--- a/lunaix-os/hal/acpi/acpi.c
+++ b/lunaix-os/hal/acpi/acpi.c
@@ -115,11 +115,11 @@ acpi_locate_rsdp(multiboot_info_t* mb_info)
 #else
     // You know what, I just search the entire 1MiB for Celestia's sake.
     uint8_t* mem_start = 0x4000;
 #else
     // You know what, I just search the entire 1MiB for Celestia's sake.
     uint8_t* mem_start = 0x4000;

-    for (size_t j = 0; j < 0x100000; j += 16) {
-        uint32_t sig_low = *((uint32_t*)(mem_start + j));
+    for (; mem_start < 0x100000; mem_start += 16) {
+        uint32_t sig_low = *((uint32_t*)(mem_start));

         // uint32_t sig_high = *((uint32_t*)(mem_start+j) + 1);
         if (sig_low == ACPI_RSDP_SIG_L) {
         // uint32_t sig_high = *((uint32_t*)(mem_start+j) + 1);
         if (sig_low == ACPI_RSDP_SIG_L) {

-            rsdp = (acpi_rsdp_t*)(mem_start + j);
+            rsdp = (acpi_rsdp_t*)(mem_start);

             break;
         }
     }
             break;
         }
     }

diff --git a/lunaix-os/hal/apic.c b/lunaix-os/hal/apic.c
index 32bfed531429633fc226a06eaa0dd9a85829b551..30951ef32b77e187d9dda2e467db70be44a0aab3 100644 (file)
--- a/lunaix-os/hal/apic.c
+++ b/lunaix-os/hal/apic.c
@@ -20,9 +20,6 @@
 
 LOG_MODULE("APIC")
 
 
 LOG_MODULE("APIC")
 

-void
-apic_setup_timer();
-

 void
 apic_setup_lvts();
 
 void
 apic_setup_lvts();
 

diff --git a/lunaix-os/includes/hal/acpi/acpi.h b/lunaix-os/includes/hal/acpi/acpi.h
index 892624497c1d274bf78ca8f30b36284cec98164d..326a8d04aad1712bee3ae15c24cdfdac914f5c14 100644 (file)
--- a/lunaix-os/includes/hal/acpi/acpi.h
+++ b/lunaix-os/includes/hal/acpi/acpi.h
@@ -9,15 +9,15 @@
 #include "madt.h"
 
 #define ACPI_RSDP_SIG_L       0x20445352      // 'RSD '
 #include "madt.h"
 
 #define ACPI_RSDP_SIG_L       0x20445352      // 'RSD '

-#define ACPI_RSDP_SIG_H      0x20525450      // 'PTR '
+#define ACPI_RSDP_SIG_H      0x20525450       // 'PTR '

 
 

-#define ACPI_MADT_SIG        0x43495041      // 'APIC'
+#define ACPI_MADT_SIG        0x43495041       // 'APIC'

 
 typedef struct {
     uint32_t signature_l;
     uint32_t signature_h;
     uint8_t chksum;
 
 typedef struct {
     uint32_t signature_l;
     uint32_t signature_h;
     uint8_t chksum;

-    uint8_t oem_id[6];
+    char oem_id[6];

     // Revision
     uint8_t rev;
     acpi_rsdt_t* rsdt;
     // Revision
     uint8_t rev;
     acpi_rsdt_t* rsdt;

diff --git a/lunaix-os/includes/hal/acpi/madt.h b/lunaix-os/includes/hal/acpi/madt.h
index ca75d08416aaedc814bc4c2336a81950b0b3d72e..72aca46158af180a83657b235fd258275e8931df 100644 (file)
--- a/lunaix-os/includes/hal/acpi/madt.h
+++ b/lunaix-os/includes/hal/acpi/madt.h
@@ -83,6 +83,6 @@ typedef struct
     acpi_apic_t* apic;
     acpi_ioapic_t* ioapic;
     acpi_intso_t** irq_exception;
     acpi_apic_t* apic;
     acpi_ioapic_t* ioapic;
     acpi_intso_t** irq_exception;

-} acpi_madt_toc_t;
+} __attribute__((packed)) acpi_madt_toc_t;

 
 #endif /* __LUNAIX_ACPI_MADT_H */
 
 #endif /* __LUNAIX_ACPI_MADT_H */

diff --git a/lunaix-os/includes/lunaix/timer.h b/lunaix-os/includes/lunaix/timer.h
index 5c406967a150cb1c4950e606be24f96a6e781632..0c65ffd0205dff61a319cc763c369a48d9389039 100644 (file)
--- a/lunaix-os/includes/lunaix/timer.h
+++ b/lunaix-os/includes/lunaix/timer.h
@@ -4,7 +4,7 @@
 #include <lunaix/ds/llist.h>
 #include <stdint.h>
 
 #include <lunaix/ds/llist.h>
 #include <stdint.h>
 

-#define SYS_TIMER_FREQUENCY_HZ      2048UL
+#define SYS_TIMER_FREQUENCY_HZ      2048

 
 #define TIMER_MODE_PERIODIC   0x1
 
 
 #define TIMER_MODE_PERIODIC   0x1
 

diff --git a/lunaix-os/kernel/k_init.c b/lunaix-os/kernel/k_init.c
index 5e6cc99fd252f8b8f05e9efdf92262d8745b4551..ce97b6ef7c20edb8872b59e30540a29eb449da1a 100644 (file)
--- a/lunaix-os/kernel/k_init.c
+++ b/lunaix-os/kernel/k_init.c
@@ -95,8 +95,8 @@ _kernel_post_init() {
     vmm_set_mapping(APIC_BASE_VADDR, __APIC_BASE_PADDR, PG_PREM_RW);
     vmm_set_mapping(IOAPIC_BASE_VADDR, ioapic_addr, PG_PREM_RW);
 
     vmm_set_mapping(APIC_BASE_VADDR, __APIC_BASE_PADDR, PG_PREM_RW);
     vmm_set_mapping(IOAPIC_BASE_VADDR, ioapic_addr, PG_PREM_RW);
 

-    ioapic_init();

     apic_init();
     apic_init();

+    ioapic_init();

     timer_init(SYS_TIMER_FREQUENCY_HZ);
 
     for (size_t i = 256; i < hhk_init_pg_count; i++) {
     timer_init(SYS_TIMER_FREQUENCY_HZ);
 
     for (size_t i = 256; i < hhk_init_pg_count; i++) {

diff --git a/lunaix-os/kernel/kprintf.c b/lunaix-os/kernel/kprintf.c
index 3bae8673e8714d52470d90a3763f4e5de4cd65de..425fc2236ed78b72583f5f6cc5f5c92d90b99c09 100644 (file)
--- a/lunaix-os/kernel/kprintf.c
+++ b/lunaix-os/kernel/kprintf.c
@@ -26,7 +26,7 @@ __kprintf(const char* component, const char* fmt, va_list args) {
         break;
     case '1':
         tty_set_theme(VGA_COLOR_BROWN, current_theme >> 12);
         break;
     case '1':
         tty_set_theme(VGA_COLOR_BROWN, current_theme >> 12);

-        snprintf(expanded_fmt, MAX_XFMT_SIZE, "[%s] (%s) %s", "INFO", component, fmt);
+        snprintf(expanded_fmt, MAX_XFMT_SIZE, "[%s] (%s) %s", "WARN", component, fmt);

         break;
     case '2':
         tty_set_theme(VGA_COLOR_LIGHT_RED, current_theme >> 12);
         break;
     case '2':
         tty_set_theme(VGA_COLOR_LIGHT_RED, current_theme >> 12);

diff --git a/lunaix-os/kernel/timer.c b/lunaix-os/kernel/timer.c
index bf3e699c66fab14ad6bb9e8394adc6b7230de776..3a261ac7360c083d3545098dc0aca157a8a2544d 100644 (file)
--- a/lunaix-os/kernel/timer.c
+++ b/lunaix-os/kernel/timer.c
@@ -76,11 +76,13 @@ timer_init(uint32_t frequency)
         Timer calibration process - measure the APIC timer base frequency
 
          step 1: setup a temporary isr for RTC timer which trigger at each tick
         Timer calibration process - measure the APIC timer base frequency
 
          step 1: setup a temporary isr for RTC timer which trigger at each tick

-       (1024Hz) step 2: setup a temporary isr for #APIC_TIMER_IV step 3: setup
-       the divider, APIC_TIMER_DCR step 4: Startup RTC timer step 5: Write a
-       large value, v, to APIC_TIMER_ICR to start APIC timer (this must be
-       followed immediately after step 4) step 6: issue a write to EOI and clean
-       up.
+                 (1024Hz) 
+         step 2: setup a temporary isr for #APIC_TIMER_IV 
+         step 3: setup the divider, APIC_TIMER_DCR 
+         step 4: Startup RTC timer 
+         step 5: Write a large value, v, to APIC_TIMER_ICR to start APIC timer (this must be
+                 followed immediately after step 4) 
+          step 6: issue a write to EOI and clean up.

 
         When the APIC ICR counting down to 0 #APIC_TIMER_IV triggered, save the
        rtc timer's counter, k, and disable RTC timer immediately (although the
 
         When the APIC ICR counting down to 0 #APIC_TIMER_IV triggered, save the
        rtc timer's counter, k, and disable RTC timer immediately (although the


@@ -147,7 +149,7 @@ timer_run(uint32_t ticks, void (*callback)(void*), void* payload, uint8_t flags)
     timer->payload = payload;
     timer->flags = flags;
 
     timer->payload = payload;
     timer->flags = flags;
 

-    llist_append(timer_ctx->active_timers, timer);
+    llist_append(timer_ctx->active_timers, &timer->link);

 
     return 1;
 }
 
     return 1;
 }


@@ -169,7 +171,7 @@ timer_update(const isr_param* param)
         if (pos->flags & TIMER_MODE_PERIODIC) {
             pos->counter = pos->deadline;
         } else {
         if (pos->flags & TIMER_MODE_PERIODIC) {
             pos->counter = pos->deadline;
         } else {

-            llist_delete(pos);
+            llist_delete(&pos->link);

             lxfree(pos);
         }
     }
             lxfree(pos);
         }
     }